Signal slicer circuit



Nov. 12, 1968 HOFFMAN 3,411,017

SIGNAL SLICER CIRCUIT Filed March 50, 1965 I CC OUTPUT VOLTAGE :2 V T v REFERENCE INPUT VOLTAGE voumcz w ee FIG. 2 v

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Y LESLIE 1E. normm B W )GLQ { ATTORNEYS United States Patent 3,411,017 SIGNAL SLICER CIRCUIT Leslie E. Hoffman, Bala Cynwyd, Pa., assignor, by mesne assignments, to the United States of America as represented by the Secretary of the Army Filed Mar. 30, 1965, Ser. No. 444,095

3 Claims. (Cl. 307-235) ABSTRACT OF THE DISCLOSURE A signal slicer circuit is disclosed. The emitters of two transistors are coupled through a pair of oppositely poled parallel connected diodes. An input voltage is applied to the base of thefirst transistor and a reference voltage is applied to the base of the second transistor. The output voltage is taken at the collector of the second transistor. The magnitude and polarity of the reference voltage determines What portion of the input signal will be removed or sliced out. Any portion of a given input signal can be removed by selecting the proper reference voltage.

This invention relates to a signal slicer circuit, and more particularly to a transistorized circuit for slicing or eliminating a portion of a signal.

For any one of numerous reasons it may be necessary or desirable to eliminate a portion of an input sign-a1. The most common reason for eliminating part of an input signal is noise suppression. Noise suppression or elimination is generally accomplished by the use of a clipper circuit. This type of circuit clips-01f the peaks of the input signals. If one Wishes to remove some portion other than the peaks of a given input signal, he can not utilize the standard clipper circuit. A signal slicer circuit must be used.

I have invented a new transistorized circuit that is capable of removing any portion of a given input signal. The portion of the signal removed is determined by a reference voltage.

Therefore, an object of my invention is to provide a signal slicer circuit.

Another object of my invention is to provide a circuit for attenuating a signal over a small region in the vicinity of a fixed reference voltage.

A further object of my invention is to provide a circuit for eliminating any predetermined portion of a signal.

The above mentioned and other objects will be evident from the following detailed description when read with the accompanying drawing wherein:

FIG. 1 shows a preferred embodiment of my invention and; 7

FIG. 2 is a graph showing the relationship of output voltage to input voltage.

Referring now to FIG. 1, the emitter of a first transistor T is coupled to the emitter of a second transistor T by means of a pair of parallel connected, oppositely poled, diodes D and D and a resistor R A bias voltage of V is applied to the emitter of transistor T through a resistor R and to the emitter of transistor T through a resistor R Resistors R and R have the same value of resistance. A bias voltage of +V is applied to the collectors of both transistors T and T An input voltage V is applied to the base of transistor T and the output voltage V is taken at the collector of transistor T The resistor R is a load resistor. A reference voltage V is applied to the base of transistor T Diodes D and D are identical diodes.

If reference voltage V; is some positive value, as indicated in FIG. 2, output voltage V will remain fixed at the 3,411,017 Patented Nov. 12, 1968 ice value labelled V quiescent in FIG. 2 so long as input voltage V remain-s within the range 2 D2l 1l 7'D2+ 2 and its direction will be from the emitter of transistor T toward the emitter of transistor T (r is the slope of the I-V curve for D This current will be drawn out of the collector supply of transistor T 2 causing a change in output voltage V 2 D2] l 1l R TD2+R2 3 Similarly, should input voltage V become more positive than V +V current will flow through diode D Its magnitude will be and its direction will be from the emitter of transistor T toward the emitter of transistor T (r is the slope of the IV curve for diode D This current ultimately flows into the collector supply of transistor T causing a change in output voltage V V V quiescent From the above discussion and from FIG. 2 it is apparent that as input voltage V increases from a negative value to a positive value, output voltage V follows the input voltage in a linear fashion until the magnitude of the input voltage approaches the magnitude of reference voltage V As input voltage V increases from V V to Vj-l-V output voltage V remains constant. When input voltage V exceeds V +V output voltage V again follows the input voltage in a linear fashion.

Reference voltage V can have any value. It can be negative, zero or positive. The magnitude of the reference voltage is, of course, limited by the power handling capabilities of the circuit components and the maximum value of the input voltage.

If reference voltage V is zero, my slicer will take out a slice of input voltage V that is symmetrical about the Y-axis of FIG. 2. Similarly, a negative reference voltage will cause the output voltage to remain constant when the input voltage lies within the range of V +V to V -V Thus, my slicer circuit can remove any given portion of an input signal by merely changing the value of the reference voltage applied to the base of transistor T;,. It should also be noted that the input voltage can be either a direct or an alternating voltage.

The foregoing disclosure relates to a preferred embodiment of my invention. Numerous modifications or alterations may be made thereto without departing from the spirit and scope of the invention as set forth in the appended claims.

What is claimed is:

1. A signal slicer circuit comprising: a first active element having first, second and third electrodes; a second active element having first, second and third electrodes;

V V quiescent R means to apply an input signal to said second electrode of said first active element; means to apply a reference voltage to said second electrode of said second active element; output terminal means connected to the third electrode of said second active element; a first diode having an anode and a cathode; a second diode having an anode and a cathode; means to connect said anode of said first diode and said cathode of said Second diode to said first electrode of said first active element; a resistor; means to connect said resistor between said first electrode of said second active element and said anode of said second diode and said cathode of said first diode; means to apply a positive bias voltage to said third electrodes of both said first and second active elements; and means to apply a negative bias voltage to said first electrodes of both said first and second active elements.

2. A signal slicer circuit comprising: a first transistor having at least a base electrode and an emitter electrode; a second transistor having an emitter electrode, a base electrode and a collector electrode; means to apply an input signal to said base electrode of said first transistor; means to apply a reference voltage to said base of said second transistor; means to derive an output signal from said collector electrode; first and second oppositely poled parallel connected diodes; a resistor; means to connect said diodes between said emitter of said first transistor and said resistor; and means to connect said resistor between said diodes and said emitter of said second transistor.

3. A signal slicer circuit comprising: a first transistor having an emitter electrode, a base electrode and a collector electrode; a second transistor having an emitter electrode, a base electrode and a collector electrode; means to apply an input signal to said base electrode of said first transistor; means to apply a reference voltage to said base of said second transistor; a source of negative bias voltage; a first resistor connected between said negative bias voltage and said emitter of said first transistor; a second resistor connected between said negative bias voltage and said emitter of said second transistor; a positive bias voltage; means to connect said positive bias voltage to said collector of said first transistor; a third resistor connected between said positive bias voltage and said collector of said second transistor; output terminal means connected at the junction of said third resistor and said collector of said second transistor; a first diode having an anode and a cathode; a second diode having an anode and a cathode; a fourth resistor having first and second terminals; means to connect said anode of said first diode and said cathode of said second diode to said emitter of said first transistor; means to connect said cathode of said first diode and said anode of said second diode to said first terminal of said fourth resistor; and means to connect said second terminal of said fourth resistor to said emitter of said second diode.

References Cited UNITED STATES PATENTS 2,861,239 11/1958 Gilbert 3073l8 2,999,173 9/1961 Ruck 32817l X 3,052,852 9/1962 Logan 307318 3,305,801 2/1967 Hartenstein 307-235 JOHN S. HEYMAN, Primary Examiner. 

